IIT Madras and IIT-M Pravartak Technologies Foundation are inviting students, industry experts, and researchers to register for the 'Digital India RISC-V' Symposium, a one-day event highlighting 'The Future of Electronics in India through the RISC-V Pathway.' It will take place on August 6, 2023, at the IIT Madras Research Park in Taramani, Chennai.

IIT Madras is eager to have a large number of students, teachers, and working professionals active in RISC-V designs participate. This is an excellent forum for learning about India's expanding RISC-V ecosystem.

There are only a few seats available for this event. Registration and participation are both free. Registration for the Symposium is now available. Those interested should register at https://pravartak.org.in/dirv_tech_confluence_registration.

The event will be addressed by Rajeev Chandrasekhar, Minister of State in the Ministries of Electronics and Information Technology and Skill Development and Entrepreneurship, Government of India, and Professor V Kamakoti, Director, IIT Madras, who developed 'SHAKTI,' India's first indigenously-designed microprocessor based on RISC-V ISA.

This symposium will include informative tech speeches by renowned academics and industry professionals, interactive exhibits exhibiting indigenous RISC-V processors, an exciting hackathon conclusion, and a special investor session.

'RISC' refers for 'Reduced Instruction Set Computer,' as opposed to other popular architectures, 'CISC' (Complex Instruction Set Computer), and 'V' is for fifth generation. In 2010, the RISC-V project began. Through open standard collaboration, the RISC-V ISA promotes a new age of processor invention.

Born in academia and research, RISC-V ISA aims to deliver a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

The RISC-V foundation was formed in 2015 with IIT Madras being one of the Founder members. The DIR-V (Digital India RISC-V) Microprocessor Programme was launched in 2022 by the GOI, with an overall aim to enable the creation of Microprocessors for the future in India, for the world and achieve industry-grade silicon & Design wins by December 2023.

RISC-V ISA-based designs are used by many companies and start-ups. RISC V ISA is open source and free of cost. For academicians, the pedagogy of RISC-V ISA opens up an industry-relevant curriculum with numerous exciting research and applications.